Training Server Systems

Our world is more connected than ever with billions of IoT devices at the edge collectively generating a tremendous of data.  These massive data sets are then transferred to and stored in cloud data centers all over the world. Insights from this data change the way we do business, interact with people, and live our daily lives. Generation of these insights normally occurs by processing the data through neural networks to recognize patterns and categorize the information. Training these neural networks is extremely compute intensive and requires high performance system architectures. While CPUs are the work horses in the data center, the highly repetitive and parallel nature of artificial intelligence workloads can be more optimally handled with a mix of compute devices.

Hardware accelerators are commonly leveraged to speed up the functions of the network, storage, and compute devices to handle these demanding workloads.  FPGAs, GPUs, and ASICs are all hardware accelerators, and each can be used to optimize the system for a specific task. Field Programmable Gate Arrays (FPGAs) are commonly used to accelerate network and storage processes and offload these tasks from the CPU. Graphics Processing Units (GPUs) are designed to handle concurrent tasks and can process large data sets more efficiently than CPUs. Application Specific Integrated Circuits or ASICs are processors designed around specific workloads or tasks allowing optimal power efficiency. Hyperscale and cloud data centers can handle a wide range of services and therefore use a mix of these devices best suited for their needs.

Protocols like Ethernet and InfiniBand are leveraged to connect these devices to the network.  Products in TE’s high speed IO portfolio like OSFP and QSFP-DD enable these connections. PCIe is leveraged to connect storage devices, network interface cards (NICs), and hardware accelerators to the CPU. TE’s Sliver connector and cable family includes products that are compliant with the SFF-TA-1002 specification and allows these devices to connect and operate at PCIe Gen 5 and Gen 6 speeds. 

Compute Express Link (CXL) and Gen-Z are emerging and quickly adopted protocols that aim to remove the memory bottleneck by enabling cache coherent memory. This helps drive new architectures, creating the need for external PCIe fabrics which use connectivity products like CDFP and Mini-SAS HD. 

TE’s STRADA Whisper high speed backplane connector and cable system can enable system modularity by offering a blind mate connection at 112 Gbps PAM-4 speeds.